The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 27, 2017
Filed:
Sep. 18, 2013
Mentor Graphics Corporation, Wilsonville, OR (US);
Wu-Tung Cheng, Lake Oswego, OR (US);
Ruifeng Guo, Portland, OR (US);
Yu Huang, Sudbury, MA (US);
Liyang Lai, Wilsonville, OR (US);
Etienne Racine, Blainville, CA;
Martin Keim, Sherwood, OR (US);
Ronald Press, West Linn, OR (US);
Jing Ye, Beijing, CN;
Yu Hu, Beijing, CN;
Mentor Graphics Corporation, Wilsonville, OR (US);
Abstract
Aspects of the invention relate to test access architecture for stacked memory and logic dies. A test access interface for a logic die that is stacked under a memory die is disclosed. The disclosed test access interface can control testing logic core, interconnections with the memory die and with another logic die. The controlling of testing interconnections with the memory die is through a memory boundary scan register controller in the test access interface.