The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 20, 2017

Filed:

Nov. 19, 2013
Applicants:

Bruce M. Green, Gilbert, AZ (US);

Darrell G. Hill, Chandler, AZ (US);

Karen E. Moore, Phoenix, AZ (US);

Inventors:

Bruce M. Green, Gilbert, AZ (US);

Darrell G. Hill, Chandler, AZ (US);

Karen E. Moore, Phoenix, AZ (US);

Assignee:

NXP USA, INC., Austin, TX (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/15 (2006.01); H01L 21/311 (2006.01); H01L 29/872 (2006.01); H01L 29/66 (2006.01); H01L 23/544 (2006.01); H01L 29/47 (2006.01); H01L 29/778 (2006.01); H01L 27/06 (2006.01); H01L 27/095 (2006.01); H01L 21/027 (2006.01); H01L 29/20 (2006.01);
U.S. Cl.
CPC ...
H01L 21/31111 (2013.01); H01L 21/0272 (2013.01); H01L 23/544 (2013.01); H01L 27/0605 (2013.01); H01L 27/095 (2013.01); H01L 29/475 (2013.01); H01L 29/66143 (2013.01); H01L 29/7787 (2013.01); H01L 29/872 (2013.01); H01L 29/2003 (2013.01); H01L 2223/54426 (2013.01); H01L 2924/0002 (2013.01);
Abstract

An embodiment of a semiconductor device includes a semiconductor substrate that includes an upper surface and a channel, a gate electrode disposed over the substrate electrically coupled to the channel, and a Schottky metal layer disposed over the substrate adjacent the gate electrode. The Schottky metal layer includes a Schottky contact electrically coupled to the channel which provides a Schottky junction and at least one alignment mark disposed over the semiconductor substrate. A method for fabricating the semiconductor device includes creating an isolation region that defines an active region along an upper surface of a semiconductor substrate, forming a gate electrode over the semiconductor substrate in the active region, and forming a Schottky metal layer over the semiconductor substrate. Forming the Schottky metal layer includes forming at least one Schottky contact electrically coupled to the channel and providing a Schottky junction, and forming an alignment mark in the isolation region.


Find Patent Forward Citations

Green, Bruce. (2017). Semiconductor devices with integrated schottky diodes and methods of fabrication (U.S. Patent No. 9685345). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9685345

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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