The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 06, 2017
Filed:
Mar. 14, 2013
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Rajasekaran Swaminathan, Tempe, AZ (US);
Donald T. Tran, Phoenix, AZ (US);
Brent S. Stone, Chandler, AZ (US);
Ram Viswanath, Phoenix, AZ (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/11 (2006.01); H05K 1/14 (2006.01); H05K 1/18 (2006.01); H05K 1/02 (2006.01); H01R 12/62 (2011.01);
U.S. Cl.
CPC ...
H05K 1/11 (2013.01); H05K 1/0204 (2013.01); H05K 1/0298 (2013.01); H05K 1/117 (2013.01); H05K 1/181 (2013.01); H01R 12/62 (2013.01); H05K 1/111 (2013.01); H05K 2201/094 (2013.01); H05K 2201/10189 (2013.01); H05K 2201/10356 (2013.01); H05K 2201/10378 (2013.01); Y02P 70/611 (2015.11);
Abstract
This disclosure relates generally to a chip package assembly arranged to be electrically coupled to a circuit board including a plurality of circuit board contacts. The chip package assembly may include a chip package including a first side and a second side, the second side including a first plurality of contacts arranged to be electrically coupled to the plurality of circuit board contacts and a second plurality of contacts arranged to be electrically coupled to a remote device via a connector assembly.