The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 30, 2017

Filed:

Sep. 24, 2014
Applicant:

Sandisk Technologies, Inc., Plano, TX (US);

Inventors:

Henry Chien, San Jose, CA (US);

Jayavel Pachamuthu, San Jose, CA (US);

Johann Alsmeier, San Jose, CA (US);

Assignee:

SANDISK TECHNOLOGIES LLC, Plano, TX (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/115 (2006.01); H01L 27/11556 (2017.01); H01L 27/11582 (2017.01); H01L 27/11519 (2017.01); H01L 27/11565 (2017.01);
U.S. Cl.
CPC ...
H01L 27/11556 (2013.01); H01L 27/11582 (2013.01); H01L 27/11519 (2013.01); H01L 27/11565 (2013.01);
Abstract

A method of making a monolithic three dimensional NAND device includes forming a stack of alternating layers of a first material and a second material different from the first material over a substrate, forming a mask layer over the stack and patterning the mask layer to form at least on opening in the mask layer to expose a top layer of the stack. The method also includes forming a metal block in the at least one opening in the mask layer, etching the stack by metal induced localized etch using the metal block in the at least one opening in the mask layer to form at least one opening in the stack and forming at least one layer of the NAND device in the at least one opening.


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