The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 30, 2017
Filed:
Dec. 09, 2015
Texas Instruments Incorporated, Dallas, TX (US);
Jie Mao, San Jose, CA (US);
Hau Nguyen, San Jose, CA (US);
Luu Nguyen, San Jose, CA (US);
Anindya Poddar, Sunnyvale, CA (US);
TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US);
Abstract
A method for fabricating packaged semiconductor devices () with an open cavity () in panel format; placing (process) on an adhesive carrier tape a panel-sized grid of metallic pieces having a flat pad () and symmetrically placed vertical pillars (); attaching (process) semiconductor chips () with sensor systems face-down onto the tape; laminating (process) and thinning (process) low CTE insulating material () to fill gaps between chips and grid; turning over (process) assembly to remove tape; plasma-cleaning assembly front side, sputtering and patterning (process) uniform metal layer across assembly and optionally plating (process) metal layer to form rerouting traces and extended contact pads for assembly; laminating (process) insulating stiffener across panel; opening (process) cavities in stiffener to access the sensor system; and singulating (process) packaged devices by cutting metallic pieces.