The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 23, 2017
Filed:
Nov. 25, 2015
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Cory E. Weber, Hillsboro, OR (US);
Mark Y. Liu, West Linn, OR (US);
Anand Murthy, Portland, OR (US);
Hemant Deshpande, Beaverton, OR (US);
Daniel B. Aubertine, North Plains, OR (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/15 (2006.01); H01L 31/0312 (2006.01); H01L 29/78 (2006.01); H01L 21/265 (2006.01); H01L 29/417 (2006.01); H01L 29/66 (2006.01); H01L 29/16 (2006.01); H01L 29/08 (2006.01); H01L 29/161 (2006.01); H01L 29/165 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7848 (2013.01); H01L 21/26506 (2013.01); H01L 29/0847 (2013.01); H01L 29/16 (2013.01); H01L 29/161 (2013.01); H01L 29/165 (2013.01); H01L 29/1608 (2013.01); H01L 29/41783 (2013.01); H01L 29/66477 (2013.01); H01L 29/66628 (2013.01); H01L 29/78 (2013.01); H01L 29/7849 (2013.01);
Abstract
A device is provided. The device includes a transistor formed on a semiconductor substrate, the transistor having a conduction channel. The device includes at least one edge dislocation formed adjacent to the conduction channel on the semiconductor substrate. The device also includes at least one free surface introduced above the conduction channel and the at least one edge dislocation.