The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 23, 2017

Filed:

Jul. 10, 2015
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Sandeep B. Sane, Chandler, AZ (US);

Shankar Ganapathysubramanian, San Jose, CA (US);

Jorge Sanchez, Phoenix, AZ (US);

Leonel R. Arana, Phoenix, AZ (US);

Eric J. Li, Chandler, AZ (US);

Nitin A. Deshpande, Chandler, AZ (US);

Jiraporn Seangatith, Chandler, AZ (US);

Poh Chieh Benny Poon, Chandler, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/52 (2006.01); H01L 29/40 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 24/32 (2013.01); H01L 23/562 (2013.01); H01L 24/81 (2013.01); H01L 24/89 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 2224/131 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/3213 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/32501 (2013.01); H01L 2224/32505 (2013.01); H01L 2224/81007 (2013.01); H01L 2224/81193 (2013.01); H01L 2224/81815 (2013.01); H01L 2924/10253 (2013.01); H01L 2924/12042 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/161 (2013.01); H01L 2924/3511 (2013.01);
Abstract

Die warpage is controlled for the assembly of thin dies. In one example, a semiconductor die has a back side and a front side opposite the back side. The back side has a semiconductor substrate and the front side has components formed over the semiconductor substrate in front side layers. A backside layer is formed over the backside of the semiconductor die to resist warpage of the die when the die is heated and a plurality of contacts are formed on the front side of the die to attach to a substrate.


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