The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 18, 2017
Filed:
Sep. 11, 2014
Applicant:
Lam Research Corporation, Fremont, CA (US);
Inventors:
Nerissa Draeger, Fremont, CA (US);
Thorsten Lill, Santa Clara, CA (US);
Diane Hymes, San Jose, CA (US);
Assignee:
LAM RESEARCH CORPORATION, Fremont, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 43/12 (2006.01); H01L 43/02 (2006.01); H01L 43/08 (2006.01); H01L 43/10 (2006.01); C23C 16/455 (2006.01); C23C 16/02 (2006.01);
U.S. Cl.
CPC ...
H01L 43/12 (2013.01); C23C 16/0227 (2013.01); C23C 16/45544 (2013.01); H01L 43/02 (2013.01); H01L 43/08 (2013.01); H01L 43/10 (2013.01);
Abstract
Systems and method include providing a non-volatile random access memory (NVRAM) stack including a plurality of layers. The plurality of layers includes a dielectric layer and a metal layer. The metal layer of the NVRAM stack is patterned. The patterning causes damage to lateral side portions of the dielectric layer. The lateral portions of the dielectric layer are repaired by depositing dielectric material on the lateral side portions of the dielectric layer.