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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9627498 B1

PDFFull Text
Date of Patent:
Apr. 18, 2017

Filed:

May. 20, 2015

Contact structure for thin film semiconductor

Applicant:

Macronix International Co., Ltd., Hsinchu, TW;

Inventors:

Jia-Rong Chiou, Hsinchu, TW;

Yu-Wei Jiang, Hsinchu, TW;

Teng-Hao Yeh, Hsinchu, TW;

Assignee:

MACRONIX INTERNATIONAL CO., LTD., Hsinchu, TW;

Attorney:

Haynes Beffel & Wolfeld LLP

Primary Examiner:

Marvin Payen

Assistant Examiner:

Jeremy Joy

Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 21/70 (2006.01); H01L 29/45 (2006.01); H01L 21/02 (2006.01); H01L 21/285 (2006.01); H01L 29/66 (2006.01); H01L 29/786 (2006.01); H01L 27/11556 (2017.01); H01L 27/11582 (2017.01); H01L 27/11548 (2017.01); H01L 27/11575 (2017.01);
U.S. Cl.
CPC ...
H01L 29/458 (2013.01); H01L 21/02532 (2013.01); H01L 21/28518 (2013.01); H01L 21/76831 (2013.01); H01L 21/76843 (2013.01); H01L 21/76855 (2013.01); H01L 21/76859 (2013.01); H01L 27/11556 (2013.01); H01L 27/11582 (2013.01); H01L 29/6675 (2013.01); H01L 29/78672 (2013.01); H01L 27/11548 (2013.01); H01L 27/11575 (2013.01);
Abstract

A method is described for forming a circuit that comprises forming a layer of semiconductor material on the substrate and an interlayer conductor contacting the layer. The layer can be a thin film layer. An opening is etched in an interlayer insulator over a layer of semiconductor material, to expose a landing area on the layer of semiconductor material. The semiconductor material exposed by the opening is thickened by adding some of the semiconductor material within the opening. The process for adding the semiconductor material can include a blanket deposition, or a selective growth only within the landing area. A reaction precursor, such as a silicide precursor is deposited on the landing area in the opening. A reaction of the precursor with the semiconductor material in the opening is induced. An interlayer conductor is formed within the opening.

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