The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 18, 2017
Filed:
Nov. 11, 2014
Globalfoundries Inc., Grand Cayman, KY;
Marc Adam Bergendahl, Hopewell Junction, NY (US);
Kangguo Cheng, Schenectady, NY (US);
David Vaclav Horak, Essex Junction, VT (US);
Ali Khakifirooz, Mountain View, CA (US);
Shom Ponoth, Gaithersburg, MD (US);
Theodorus Eduardus Standaert, Clifton Park, NY (US);
Chih-Chao Yang, Glenmont, NY (US);
Charles William Koburger, III, Delmar, NY (US);
Xiuyu Cai, Niskayuna, NY (US);
Ruilong Xie, Schenectady, NY (US);
GLOBALFOUNDRIES INC., Grand Cayman, KY;
Abstract
Embodiments of the present invention provide a method of forming semiconductor structure. The method includes forming a set of device features on top of a substrate; forming a first dielectric layer directly on top of the set of device features and on top of the substrate, thereby creating a height profile of the first dielectric layer measured from a top surface of the substrate, the height profile being associated with a pattern of an insulating structure that fully surrounds the set of device features; and forming a second dielectric layer in areas that are defined by the pattern to create the insulating structure. A structure formed by the method is also disclosed.