The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 11, 2017
Filed:
May. 15, 2015
Applicant:
Micron Technology, Inc., Boise, ID (US);
Inventors:
Assignee:
Micron Technology, Inc., Boise, ID (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01K 3/10 (2006.01); H05K 3/42 (2006.01); H05K 1/02 (2006.01); H05K 1/16 (2006.01); H05K 3/10 (2006.01); H05K 1/11 (2006.01);
U.S. Cl.
CPC ...
H05K 3/429 (2013.01); H05K 1/0222 (2013.01); H05K 1/162 (2013.01); H05K 3/10 (2013.01); H05K 3/42 (2013.01); H05K 1/115 (2013.01); H05K 2201/09809 (2013.01); Y10T 29/4916 (2015.01); Y10T 29/49155 (2015.01); Y10T 29/49156 (2015.01); Y10T 29/49163 (2015.01); Y10T 29/49165 (2015.01); Y10T 29/49167 (2015.01);
Abstract
One embodiment of the invention comprises an improved method for making a via structure for use in a printed circuit board (PCB). The via allows for the passage of a signal from one signal plane to another in the PCB, and in so doing transgresses the power and ground planes between the signal plane. To minimize EM disturbance between the power and ground planes, signal loss due to signal return current, and via-to-via coupling, the via is shielded within two concentric cylinders, each coupled to one of the power and ground planes.