The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 14, 2017

Filed:

Dec. 28, 2015
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;

Inventors:

Yu-Hung Cheng, Tainan, TW;

Cheng-Ta Wu, Shueishang Township, TW;

Yeur-Luen Tu, Taichung, TW;

Chia-Shiung Tsai, Hsin-Chu, TW;

Ru-Liang Lee, Hsinchu, TW;

Tung-I Lin, Tainan, TW;

Wei-Li Chen, Tainan, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/167 (2006.01); H01L 29/207 (2006.01); H01L 29/227 (2006.01); H01L 31/0288 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 21/02 (2006.01); H01L 29/10 (2006.01); H01L 27/146 (2006.01); H01L 29/06 (2006.01); H01L 29/16 (2006.01); H01L 29/165 (2006.01);
U.S. Cl.
CPC ...
H01L 29/42364 (2013.01); H01L 21/0262 (2013.01); H01L 21/02532 (2013.01); H01L 21/02579 (2013.01); H01L 21/02636 (2013.01); H01L 27/14614 (2013.01); H01L 27/14638 (2013.01); H01L 29/0649 (2013.01); H01L 29/0688 (2013.01); H01L 29/105 (2013.01); H01L 29/1037 (2013.01); H01L 29/1054 (2013.01); H01L 29/16 (2013.01); H01L 29/4236 (2013.01); H01L 29/66636 (2013.01); H01L 29/66651 (2013.01); H01L 29/66666 (2013.01); H01L 29/165 (2013.01);
Abstract

The present disclosure relates to a transistor device. In some embodiments, the transistor device has an epitaxial layer disposed over a substrate. The epitaxial layer is arranged between a source region and a drain region separated along a first direction. Isolation structures are arranged on opposite sides of the epitaxial layer along a second direction, perpendicular to the first direction. A gate dielectric layer is disposed over the epitaxial layer, and a conductive gate electrode is disposed over the gate dielectric layer. The epitaxial layer overlying the substrate improves the surface roughness of the substrate, thereby improving transistor device performance.


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