The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 28, 2017
Filed:
Apr. 16, 2015
Applicant:
Qualcomm Incorporated, San Diego, CA (US);
Inventors:
Jae Sik Lee, San Diego, CA (US);
Hong Bok We, San Diego, CA (US);
Dong Wook Kim, San Diego, CA (US);
Assignee:
QUALCOMM INCORPORATED, San Diego, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 25/065 (2006.01); H01L 21/56 (2006.01); H01L 21/768 (2006.01); H01L 23/29 (2006.01); H01L 23/31 (2006.01); H01L 23/522 (2006.01); H01L 25/00 (2006.01); H01L 23/00 (2006.01); H01L 23/498 (2006.01); H01L 23/538 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0655 (2013.01); H01L 21/565 (2013.01); H01L 21/7684 (2013.01); H01L 21/76802 (2013.01); H01L 21/76843 (2013.01); H01L 21/76877 (2013.01); H01L 23/293 (2013.01); H01L 23/3135 (2013.01); H01L 23/3171 (2013.01); H01L 23/5226 (2013.01); H01L 23/5386 (2013.01); H01L 23/5389 (2013.01); H01L 24/19 (2013.01); H01L 24/20 (2013.01); H01L 24/96 (2013.01); H01L 25/50 (2013.01); H01L 21/568 (2013.01); H01L 23/49816 (2013.01); H01L 23/49822 (2013.01); H01L 23/5383 (2013.01); H01L 2224/04105 (2013.01); H01L 2224/12105 (2013.01); H01L 2224/18 (2013.01); H01L 2224/24137 (2013.01); H01L 2924/0002 (2013.01);
Abstract
A semiconductor device may include a first semiconductor die. A passivation layer supports the first semiconductor die. The passivation layer may include a first via having a barrier layer and a first redistribution layer (RDL) conductive interconnect coupled to the first via through the barrier layer. The first via may couple the first semiconductor die to the first RDL conductive interconnect.