The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 07, 2017
Filed:
Aug. 28, 2015
International Business Machines Corporation, Armonk, NY (US);
Globalfoundries Inc., Grand Cayman, KY;
Renesas Electronics Corporation, Tokyo, JP;
Murat Kerem Akarvardar, Albany, NY (US);
Steven John Bentley, Albany, NY (US);
Kangguo Cheng, Schenectady, NY (US);
Bruce B. Doris, Slingerlands, NY (US);
Jody Fronheiser, Albany, NY (US);
Ajey Poovannummoottil Jacob, Albany, NY (US);
Ali Khakifirooz, Los Altos, CA (US);
Toshiharu Nagumo, Sagamihara, JP;
International Business Machines Corporation, Armonk, NY (US);
GLOBALFOUNDRIES INC., Grand Cayman, KY;
RENESAS ELECTRONICS CORPORATION, Kanagawa, JP;
Abstract
A method of forming a semiconductor structure includes forming a first isolation region between fins of a first group of fins and between fins of a second group of fins. The first a second group of fins are formed in a bulk semiconductor substrate. A second isolation region is formed between the first group of fins and the second group of fins, the second isolation region extends through a portion of the first isolation region such that the first and second isolation regions are in direct contact and a height above the bulk semiconductor substrate of the second isolation region is greater than a height above the bulk semiconductor substrate of the first isolation region.