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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9548220 B1

PDFFull Text
Date of Patent:
Jan. 17, 2017

Filed:

Jan. 04, 2016

Method of fabricating semiconductor package having an interposer structure

Applicant:

Siliconware Precision Industries Co., Ltd., Taichung, TW;

Inventors:

Kuan-Wei Chuang, Taichung, TW;

Chun-Tang Lin, Taichung, TW;

Yi-Chian Liao, Taichung, TW;

Yi-Che Lai, Taichung, TW;

Assignee:

Siliconware Precision Industries Co., Ltd., Taichung, TW;

Attorneys:

Mintz Levin Cohn Ferris Glovsky and Popeo, P.C.

Peter F. Corless

Steven M. Jensen

Primary Examiner:

Evan Pert

Int. Cl.
CPC ...
H01L 21/48 (2006.01); H01L 21/58 (2006.01); H01L 23/498 (2006.01); H01L 21/78 (2006.01); H01L 23/00 (2006.01); H01L 23/14 (2006.01); H01L 21/311 (2006.01); H01L 21/56 (2006.01); H01L 21/683 (2006.01); H01L 25/00 (2006.01);
U.S. Cl.
CPC ...
H01L 21/486 (2013.01); H01L 21/31111 (2013.01); H01L 21/4853 (2013.01); H01L 21/563 (2013.01); H01L 21/6835 (2013.01); H01L 21/78 (2013.01); H01L 23/147 (2013.01); H01L 23/49827 (2013.01); H01L 23/49872 (2013.01); H01L 24/03 (2013.01); H01L 24/08 (2013.01); H01L 24/11 (2013.01); H01L 24/17 (2013.01); H01L 24/97 (2013.01); H01L 25/50 (2013.01); H01L 23/49816 (2013.01); H01L 2224/02317 (2013.01); H01L 2224/02372 (2013.01); H01L 2224/03002 (2013.01); H01L 2224/08235 (2013.01); H01L 2224/16 (2013.01); H01L 2224/16245 (2013.01); H01L 2924/351 (2013.01);
Abstract

A method of fabricating a semiconductor package is provided, including: cutting a substrate into a plurality of interposers; disposing the interposers in a plurality of openings of a carrier, wherein the openings are spaced from one another by a distance; forming a first encapsulant to encapsulate the interposers; removing the carrier; and disposing at least a semiconductor element on each of the interposers. By cutting the substrate first, good interposers can be selected and rearranged such that finished packages can be prevented from being wasted due to inferior interposers.

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