The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 13, 2016
Filed:
Dec. 09, 2014
Applicant:
Siliconware Precision Industries Co., Ltd., Taichung, TW;
Inventors:
Chang-Fu Lin, Taichung, TW;
Chin-Tsai Yao, Taichung, TW;
Ming-Chin Chuang, Taichung, TW;
Ko-Cheng Liu, Taichung, TW;
Fu-Tang Huang, Taichung, TW;
Assignee:
Siliconware Precision Industries Co., Ltd., Taichung, TW;
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 23/498 (2006.01); H05K 1/02 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49822 (2013.01); H01L 23/49838 (2013.01); H05K 1/0298 (2013.01); H01L 23/3121 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/73204 (2013.01); H01L 2924/15174 (2013.01); H01L 2924/181 (2013.01); H05K 2201/0191 (2013.01); H05K 2201/0195 (2013.01);
Abstract
A packaging substrate and a package structure are provided. The packaging substrate includes a plurality of dielectric layers, two of which have a difference in thickness; and a plurality of circuit layers alternately stacked with the dielectric layers. Therefore, the package warpage encountered in the prior art is avoided.