The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 13, 2016
Filed:
Sep. 11, 2012
Michael B Vincent, Chandler, AZ (US);
Zhiwei Gong, Chandler, AZ (US);
Scott M Hayes, Chandler, AZ (US);
Douglas G Mitchell, Tempe, AZ (US);
Michael B Vincent, Chandler, AZ (US);
Zhiwei Gong, Chandler, AZ (US);
Scott M Hayes, Chandler, AZ (US);
Douglas G Mitchell, Tempe, AZ (US);
FREESCALE SEMICONDUCTOR, INC., Austin, TX (US);
Abstract
Embodiments of a microelectronic package including at least one trench via are provided, as are embodiments of a method for fabricating such a microelectronic package. In one embodiment, the method includes the step of depositing a dielectric layer over a first microelectronic device having a plurality of contact pads, which are covered by the dielectric layer. A trench via is formed in the dielectric layer to expose the plurality of contact pads therethrough. The trench via is formed to include opposing crenulated sidewalls having a plurality of recesses therein. The plurality of contact pads exposed through the trench via are then sputter etched. A plurality of interconnect lines is formed over the dielectric layer, each of which is electrically coupled to a different one of the plurality of contact pads.