The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 13, 2016

Filed:

Nov. 07, 2013
Applicant:

Siliconware Precision Industries Co., Ltd., Taichung, TW;

Inventors:

Hong-Da Chang, Taichung, TW;

Yi-Che Lai, Taichung, TW;

Chi-Hsin Chiu, Taichung, TW;

Shih-Kuang Chiu, Taichung, TW;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/28 (2006.01); H01L 21/48 (2006.01); H01L 23/00 (2006.01); H01L 23/538 (2006.01); H01L 23/31 (2006.01); H01L 21/56 (2006.01);
U.S. Cl.
CPC ...
H01L 21/4857 (2013.01); H01L 23/5383 (2013.01); H01L 24/97 (2013.01); H01L 21/561 (2013.01); H01L 21/568 (2013.01); H01L 23/3128 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/73253 (2013.01); H01L 2224/81005 (2013.01); H01L 2224/83005 (2013.01); H01L 2224/92125 (2013.01); H01L 2224/97 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/351 (2013.01);
Abstract

A fabrication method of a semiconductor package is disclosed, which includes the steps of: providing a semiconductor structure having a carrier, a circuit portion formed on the carrier and a plurality of semiconductor elements disposed on the circuit portion; disposing a lamination member on the semiconductor elements; forming an insulating layer on the circuit portion for encapsulating the semiconductor elements; and removing the carrier. The lamination member increases the strength between adjacent semiconductor elements so as to overcome the conventional cracking problem caused by a CTE mismatch between the semiconductor elements and the insulating layer when the carrier is removed.


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