The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 06, 2016

Filed:

Jun. 12, 2015
Applicant:

Cadence Design Systems, Inc., San Jose, CA (US);

Inventors:

Steev Wilcox, San Jose, CA (US);

Brian Edward Foutz, Charlottesville, VA (US);

Paul Alexander Cunningham, Mountain View, CA (US);

Vivek Chickermane, Slaterville Springs, NY (US);

Krishna Vijaya Chakravadhanula, Vestal, NY (US);

Assignee:

Cadence Design Systems, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/22 (2006.01); G06F 17/50 (2006.01); G01R 31/3177 (2006.01);
U.S. Cl.
CPC ...
G01R 31/3177 (2013.01);
Abstract

Methods and apparatus for decompressing test data using XOR trees for application to scan chains of a design for test (DFT) integrated circuit in a physically efficient construction are disclosed. Moreover, methods and apparatus for compressing test response data from scan chains in a DFT integrated circuit in a physically efficient construction are disclosed. The XOR tree decompression method may comprise splitting signals at each node of the XOR trees according to distribution logic implemented by a set of XOR gates. The XOR tree compression method may comprise combining signals at each node of the XOR trees according to combination logic implemented by a set of XOR gates.


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