The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 20, 2016
Filed:
Feb. 19, 2016
Applicant:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Inventors:
Tain-Shang Chang, Tainan, TW;
Chia-Han Lai, Zhubei, TW;
Ren-Hau Yu, Kaohsiung, TW;
Ching-Yao Sun, Kaohsiung, TW;
Yu-Sheng Wang, Tainan, TW;
Assignee:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/76 (2006.01); H01L 29/94 (2006.01); H01L 31/062 (2012.01); H01L 31/113 (2006.01); H01L 31/119 (2006.01); H01L 23/532 (2006.01); H01L 21/768 (2006.01); H01L 21/3205 (2006.01); H01L 21/311 (2006.01); H01L 21/285 (2006.01);
U.S. Cl.
CPC ...
H01L 23/53209 (2013.01); H01L 21/28518 (2013.01); H01L 21/31105 (2013.01); H01L 21/31116 (2013.01); H01L 21/32053 (2013.01); H01L 21/76814 (2013.01); H01L 21/76831 (2013.01); H01L 21/76879 (2013.01); H01L 23/5329 (2013.01); H01L 21/76843 (2013.01); H01L 21/76855 (2013.01);
Abstract
In a method for manufacturing a semiconductor device, a dielectric layer is formed on a substrate, and a contact hole is formed from the dielectric layer to the substrate. A dielectric spacer liner is formed to cover a sidewall and a bottom of the contact hole. A portion of the dielectric spacer liner is removed to expose a portion of the substrate. A metal silicide layer is formed into the substrate through the contact hole.