The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 13, 2016

Filed:

Mar. 07, 2012
Applicants:

Qing MA, Saratoga, CA (US);

Johanna M Swan, Scottsdale, AZ (US);

Inventors:

Qing Ma, Saratoga, CA (US);

Johanna M Swan, Scottsdale, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 5/00 (2006.01); H05K 1/00 (2006.01); H05K 1/11 (2006.01); H05K 1/03 (2006.01); H01L 23/498 (2006.01); H05K 3/40 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H05K 1/0306 (2013.01); H01L 23/49816 (2013.01); H01L 23/49822 (2013.01); H01L 23/49827 (2013.01); H01L 23/49894 (2013.01); H05K 3/40 (2013.01); H01L 24/16 (2013.01); H01L 2224/131 (2013.01); H01L 2224/13111 (2013.01); H01L 2224/16238 (2013.01); H01L 2224/81192 (2013.01); H01L 2924/00013 (2013.01); H01L 2924/12042 (2013.01); Y10T 29/49147 (2015.01);
Abstract

Embodiments of the present description relate to the field of fabricating microelectronic substrates. The microelectronic substrate may include a trace routing structure disposed between opposing glass layers. The trace routing structure may comprise one or more dielectric layers having conductive traces formed thereon and therethrough. Also disclosed are embodiments of a microelectronic package including a microelectronic device disposed proximate one glass layer of the microelectronic substrate and coupled with the microelectronic substrate by a plurality of interconnects.


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