The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 06, 2016

Filed:

Aug. 29, 2014
Applicant:

Crossbar, Inc., Santa Clara, CA (US);

Inventors:

Harry Yue Gee, Santa Clara, CA (US);

Majid Milani, San Jose, CA (US);

Natividad Vasquez, Jr., San Francisco, CA (US);

Steven Patrick Maxwell, Sunnyvale, CA (US);

Sundar Narayanan, Cupertino, CA (US);

Assignee:

Crossbar, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/332 (2006.01); H01L 45/00 (2006.01);
U.S. Cl.
CPC ...
H01L 45/06 (2013.01); H01L 45/1233 (2013.01); H01L 45/14 (2013.01); H01L 45/145 (2013.01); H01L 45/148 (2013.01); H01L 45/16 (2013.01); H01L 45/1608 (2013.01);
Abstract

During fabrication of a two-terminal memory device, a terminal (e.g., bottom terminal) can be formed. After formation of the terminal, a chemical mechanical planarization (CMP) process can be applied that, depending on the composition of the terminal, can cause damage that affect operating characteristics of the finished memory device or cell. In some embodiments, such damage can be removed by one or more post-CMP processes. In some embodiments, such damage can be mitigated so as to prevent the damage from occurring at all, by, e.g., forming a sacrificial layer atop the terminal prior to performing the CMP process. Thus, the sacrificial layer can operate to protect the terminal from damage resulting from the CMP process, with the remainder of the sacrificial layer being removed prior to completing the fabrication of the two-terminal memory device.


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