The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 06, 2016
Filed:
Aug. 24, 2015
Applicant:
Power Integrations, Inc., San Jose, CA (US);
Inventors:
Jamal Ramdani, Raritan, NJ (US);
John P. Edwards, Verona, NJ (US);
Linlin Liu, Hillsborough, NJ (US);
Assignee:
Power Integrations, Inc., San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 31/072 (2012.01); H01L 29/205 (2006.01); H01L 21/02 (2006.01); H01L 29/10 (2006.01); H01L 29/20 (2006.01); H01L 29/78 (2006.01); H01L 29/04 (2006.01); H01L 29/778 (2006.01);
U.S. Cl.
CPC ...
H01L 29/205 (2013.01); H01L 21/0226 (2013.01); H01L 21/0254 (2013.01); H01L 21/0262 (2013.01); H01L 21/02381 (2013.01); H01L 21/02458 (2013.01); H01L 21/02488 (2013.01); H01L 21/02642 (2013.01); H01L 29/045 (2013.01); H01L 29/1075 (2013.01); H01L 29/2003 (2013.01); H01L 29/778 (2013.01); H01L 29/78 (2013.01); H01L 29/7786 (2013.01);
Abstract
A GaN HFET includes a silicon substrate with an AlOlayer above the silicon substrate. The AlOlayer has voids formed therein. A plurality of alternating GaN and AlN layers are above the AlOlayer. The GaN and AlN layers are under continuous compressive stress.