The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 16, 2016

Filed:

Nov. 19, 2014
Applicant:

Advanced Semiconductor Engineering, Inc., Kaohsiung, TW;

Inventors:

Yuan-Chang Su, Kaohsiung, TW;

Chih-Cheng Lee, Kaohsiung, TW;

Cheng-Lin Ho, Kaohsiung, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/552 (2006.01); H05K 1/18 (2006.01); H01L 23/498 (2006.01); H01L 21/48 (2006.01); H05K 3/30 (2006.01); H05K 3/46 (2006.01); H05K 3/10 (2006.01); H05K 3/18 (2006.01);
U.S. Cl.
CPC ...
H05K 1/188 (2013.01); H01L 21/486 (2013.01); H01L 21/4857 (2013.01); H01L 23/49822 (2013.01); H01L 23/49827 (2013.01); H01L 23/49838 (2013.01); H01L 23/49866 (2013.01); H05K 3/107 (2013.01); H05K 3/188 (2013.01); H05K 3/30 (2013.01); H05K 3/4682 (2013.01); H05K 2201/09563 (2013.01); H05K 2201/1003 (2013.01); H05K 2201/10015 (2013.01); H05K 2201/10022 (2013.01); H05K 2201/10651 (2013.01); H05K 2203/1316 (2013.01);
Abstract

Disclosed is a semiconductor package structure and manufacturing method. The semiconductor package structure includes a first dielectric layer, a second dielectric layer, a component, a patterned conductive layer and at least two conductive vias. The first dielectric layer has a first surface and a second surface opposite the first surface. The second dielectric layer has a first surface and a second surface opposite the first surface. The second surface of the first dielectric layer is attached to the first surface of the second dielectric layer. A component within the second dielectric layer has at least two electrical contacts adjacent to the second surface of the first dielectric layer. The patterned conductive layer within the first dielectric layer is adjacent to the first surface of the first dielectric layer. The conductive vias penetrate the first dielectric layer and electrically connect the electrical contacts with the patterned conductive layer.


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