The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 16, 2016
Filed:
Aug. 15, 2012
Lidia Vereen, San Ramon, CA (US);
Bruce Bateman, Fremont, CA (US);
David Eggleston, San Jose, CA (US);
Louis Parrillo, Austin, TX (US);
Lidia Vereen, San Ramon, CA (US);
Bruce Bateman, Fremont, CA (US);
David Eggleston, San Jose, CA (US);
Louis Parrillo, Austin, TX (US);
UNITY SEMICONDUCTOR CORPORATION, Sunnyvale, CA (US);
Abstract
A method of manufacturing a memory structure includes forming a plurality of vertically-stacked horizontal line layers, interleaving a plurality of electrically conductive vertical lines with the electrically conductive horizontal lines, and forming a memory film at and between intersections of the electrically conductive vertical lines and the horizontal lines. In one embodiment of the invention, the electrically conductive vertical lines are interleaved with the horizontal lines such that a row of vertical lines is positioned between each horizontally-adjacent pair of horizontal lines in each horizontal line layer. By configuring the electrically conductive vertical lines and electrically conductive horizontal lines so that a row of vertical lines is positioned between each horizontally-adjacent pair of horizontal lines, a unit memory cell footprint of just 2Fmay be realized.