The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 16, 2016
Filed:
May. 06, 2014
Nabil Badereddine, Grasse, FR;
Leonardo H. Bonet Zordan, Montpellier, FR;
Patrick Girard, Villetelle, FR;
Alberto Bosio, Montpellier, FR;
Nabil Badereddine, Grasse, FR;
Leonardo H. Bonet Zordan, Montpellier, FR;
Patrick Girard, Villetelle, FR;
Alberto Bosio, Montpellier, FR;
Intel IP Corporation, Santa Clara, CA (US);
Abstract
Assist circuits for SRAM memory tests allow voltage scaling in low-power SRAMs. Word line level reduction (WLR) and negative bit line (NBL) boost assist techniques improve read stability and write margin of SRAM core-cells, respectively, when the memory operates at a lowered supply voltage. Assist circuits are activated at particular points in the memory cell circuit. The assist circuits are selectively activated for modifying the voltage along particular circuit elements to identify the potential defects that might be otherwise masked until substantially large. A March test invokes elements for activating the assist circuits to identify defects and indicate functional fault models (FFMs) associated with the defects.