The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 09, 2016
Filed:
Jun. 05, 2014
Globalfoundries Inc., Grand Cayman, KY;
Yan Ding, Essex Junction, VT (US);
Vibhor Jain, Essex Junction, VT (US);
Thomas Kessler, Burlington, VT (US);
Yves T. Ngu, Essex Junction, VT (US);
Robert M. Rassel, Colchester, VT (US);
Sebastian T. Ventrone, South Burlington, VT (US);
GLOBALFOUNDRIES INC., Grand Cayman, KY;
Abstract
In an approach to fabricating a silicon on insulator wafer, one or more semiconductor device elements are implanted and one or more shallow trench isolations are formed on a top surface of a first semiconductor wafer. A first dielectric material layer is deposited over the top surface of the first semiconductor wafer, filling the shallow trench isolations. A dielectric material layer on a bottom surface of a second semiconductor wafer is bonded to a dielectric material layer on the top of the first semiconductor wafer and one or more semiconductor devices are formed on a top surface of the second semiconductor wafer. Then, one or more through silicon vias are created connecting the one or more semiconductor devices on the top surface of the second semiconductor wafer and the one or more semiconductor device elements on the top surface of the first semiconductor wafer.