The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 05, 2016

Filed:

Aug. 15, 2014
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Abhinav Pandey, Boise, ID (US);

Hanmant P. Belgal, El Dorado Hills, CA (US);

Prashant S. Damle, Hillsboro, OR (US);

Arjun Kripanidhi, Mountain View, CA (US);

Sebastian T. Uribe, El Dorado Hills, CA (US);

Dany-Sebastien Ly-Gagnon, Santa Clara, CA (US);

Sanjay Rangan, Boise, ID (US);

Kiran Pangal, Fremont, CA (US);

Assignee:

INTEL CORPORATION, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01); G11C 7/12 (2006.01); G11C 29/50 (2006.01); G06F 11/10 (2006.01); G11C 14/00 (2006.01); G11C 7/04 (2006.01); G11C 13/00 (2006.01);
U.S. Cl.
CPC ...
G11C 7/12 (2013.01); G06F 11/1072 (2013.01); G11C 7/04 (2013.01); G11C 13/0004 (2013.01); G11C 14/0045 (2013.01); G11C 29/50004 (2013.01); G11C 13/0002 (2013.01); G11C 2029/5004 (2013.01);
Abstract

Embodiments including systems, methods, and apparatuses associated with expanding a threshold voltage window of memory cells are described herein. Specifically, in some embodiments memory cells may be configured to store data by being set to a set state or a reset state. In some embodiments, a dummy-read process may be performed on memory cells in the set state prior to a read process. In some embodiments, a modified reset algorithm may be performed on memory cells in the reset state. Other embodiments may be described or claimed.


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