The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 28, 2016
Filed:
Jul. 22, 2013
Sandisk Technologies Inc., Plano, TX (US);
Vinod Robert Purayath, Santa Clara, CA (US);
Tuan Pham, San Jose, CA (US);
Hiroyuki Kinoshita, San Jose, CA (US);
Yuan Zhang, San Jose, CA (US);
Henry Chin, Santa Clara, CA (US);
James K Kai, Santa Clara, CA (US);
Takashi W Orimoto, Sunnyvale, CA (US);
George Matamis, San Jose, CA (US);
Henry Chien, San Jose, CA (US);
SanDisk Technologies Inc., Plano, TX (US);
Abstract
High-density semiconductor memory utilizing metal control gate structures and air gap electrical isolation between discrete devices in these types of structures are provided. During gate formation and definition, etching the metal control gate layer(s) is separated from etching the charge storage layer to form protective sidewall spacers along the vertical sidewalls of the metal control gate layer(s). The sidewall spacers encapsulate the metal control gate layer(s) while etching the charge storage material to avoid contamination of the charge storage and tunnel dielectric materials. Electrical isolation is provided, at least in part, by air gaps that are formed in the row direction and/or air gaps that are formed in the column direction.