The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 28, 2016

Filed:

Sep. 02, 2014
Applicant:

United Microelectronics Corporation, Hsinchu, TW;

Inventors:

Yi-Ching Wu, Zhudong Township, TW;

Horng-Bor Lu, Hsinchu, TW;

Yung-Chieh Kuo, Zhubei, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/94 (2006.01); H01L 29/76 (2006.01); H01L 21/306 (2006.01); H01L 21/283 (2006.01); H01L 21/308 (2006.01);
U.S. Cl.
CPC ...
H01L 21/30625 (2013.01); H01L 21/283 (2013.01); H01L 21/308 (2013.01); H01L 21/30604 (2013.01);
Abstract

A method for planarizing a semiconductor device is provided. The method includes steps hereinafter. A substrate is provided with a first dielectric layer covering at least one electrode structure formed thereon. A chemical-mechanical polishing (CMP) process is performed on the first dielectric layer until the at least one electrode structure is exposed. A second dielectric layer is deposited covering the at least one electrode structure and the first dielectric layer. An etching-back process is performed on the second dielectric layer until the at least one electrode structure is exposed.


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