The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 07, 2016
Filed:
Dec. 29, 2014
Applicant:
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Inventors:
Chih-Hsiang Huang, Zhubei, TW;
Da-Wen Lin, Hsin-Chu, TW;
Assignee:
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 31/062 (2012.01); H01L 27/088 (2006.01); H01L 29/06 (2006.01); H01L 29/78 (2006.01); H01L 21/8234 (2006.01); H01L 21/324 (2006.01); H01L 21/265 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0886 (2013.01); H01L 21/26506 (2013.01); H01L 21/324 (2013.01); H01L 21/823418 (2013.01); H01L 21/823431 (2013.01); H01L 21/823481 (2013.01); H01L 29/0653 (2013.01); H01L 29/7848 (2013.01); H01L 29/7851 (2013.01); H01L 2029/7858 (2013.01);
Abstract
A device comprises a first semiconductor fin over a substrate, a second semiconductor fin over the substrate, wherein the first semiconductor fin and the second semiconductor fin are separated by a first isolation region, a first drain/source region coupled to the first semiconductor fin and the second semiconductor fin and a first dislocation plane underlying the first isolation region, wherein the first dislocation plane extends in a first direction in parallel with a longitudinal axis of the first semiconductor fin.