The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9362123 B1

PDF
Full Text
Expired
Date of Patent:
Jun. 07, 2016

Filed:

Dec. 21, 2012
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;

Inventors:

Liang-Gi Yao, Shin Chu, TW;

I-Ming Chang, Shin Chu, TW;

Yasutoshi Okuno, Soraku-gun, JP;

Chih-Hao Chang, Chu-Bei, TW;

Shou Zen Chang, Panchiao, TW;

Clement Hsingjen Wann, Carmel, NY (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/20 (2006.01); H01L 29/78 (2006.01); H01L 27/12 (2006.01); H01L 21/28 (2006.01); H01L 29/66 (2006.01); H01L 29/10 (2006.01); H01L 21/02 (2006.01); H01L 29/51 (2006.01);
U.S. Cl.
CPC ...
H01L 21/2807 (2013.01); H01L 29/1054 (2013.01); H01L 29/66545 (2013.01); H01L 29/785 (2013.01); H01L 21/02381 (2013.01); H01L 21/02532 (2013.01); H01L 29/513 (2013.01); H01L 29/517 (2013.01); H01L 29/66651 (2013.01);
Abstract

The present disclosure provides one embodiment of a semiconductor structure. The semiconductor structure includes a semiconductor substrate having a first semiconductor material and a first reactivity; and a low reactivity capping layer of disposed on the semiconductor substrate, wherein the low reactivity capping layer includes a second semiconductor material and a second reactivity less than the first reactivity, the low reactivity capping layer includes silicon germanium SiGeand x is less than about 30%.


Find Patent Forward Citations

Yao, Liang-Gi. (2016). Structure and method for integrated devices on different substartes with interfacial engineering (U.S. Patent No. 9362123). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9362123

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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