The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 17, 2016
Filed:
Jan. 22, 2014
Globalfoundaries Inc., Grand Cayman, KY;
James W. Adkisson, Jericho, VT (US);
James S. Dunn, Jericho, VT (US);
Blaine J. Gross, Essex Junction, VT (US);
David L. Harame, Essex Junction, VT (US);
Qizhi Liu, Lexington, MA (US);
John J. Pekarik, Underhill, VT (US);
GLOBALFOUNDRIES Inc., Grand Cayman, KY;
Abstract
At least one isolation trench formed in a layer stack including substrate, channel, and upper gate layers define a channel in the channel layer. Lateral etching from the isolation trench(es) can form lateral cavities in the substrate and upper gate layer to substantially simultaneously form self-aligned lower and upper gates. The lower gate undercuts the channel, the upper gate is narrower than the channel, and a source and a drain can be formed on opposed ends of the channel. As a result, source-drain capacitance and gate-drain capacitance can be reduced, increasing speed of the resulting FET.