The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 10, 2016

Filed:

Dec. 23, 2014
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Chung-Ying Yang, Taoyuan, TW;

Hsien-Wei Chen, Sinying, TW;

Tsung-Yuan Yu, Taipei, TW;

Shih-Wei Liang, Daija Township, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/31 (2006.01); H01L 21/56 (2006.01); H01L 23/58 (2006.01); H01L 21/768 (2006.01); H01L 23/528 (2006.01); H01L 23/522 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3142 (2013.01); H01L 21/561 (2013.01); H01L 21/563 (2013.01); H01L 21/568 (2013.01); H01L 21/76895 (2013.01); H01L 23/3114 (2013.01); H01L 23/528 (2013.01); H01L 23/5226 (2013.01); H01L 23/585 (2013.01); H01L 24/19 (2013.01); H01L 24/20 (2013.01); H01L 24/96 (2013.01); H01L 23/562 (2013.01); H01L 23/564 (2013.01); H01L 24/05 (2013.01); H01L 24/13 (2013.01); H01L 2224/02377 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/04105 (2013.01); H01L 2224/05569 (2013.01); H01L 2224/05572 (2013.01); H01L 2224/12105 (2013.01); H01L 2224/131 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/01029 (2013.01);
Abstract

A package comprises a semiconductor device. The semiconductor device comprises an active surface and side surfaces. The active surface has a contact pad. The package also comprises a mold covering the side surfaces of the semiconductor device. The package further comprises an interconnection line coupled with the contact pad and extending over the active surface of the semiconductor device. The package additionally comprises an under-bump metallurgy (UBM) layer over the interconnection line. The package also comprises a seal ring structure extending around and outside an upper periphery of the semiconductor device on the mold, the seal ring structure comprising a seal layer extending on a same level as at least one of the interconnection line or the UBM layer.


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