The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 03, 2016

Filed:

Mar. 13, 2012
Applicants:

Alok Vaid, Ballston Lake, NY (US);

Ned R. Saleh, Santa Clara, CA (US);

Matthew J. Sendelbach, Fishkill, NY (US);

Narender N. Rana, Highland, NY (US);

Inventors:

Alok Vaid, Ballston Lake, NY (US);

Ned R. Saleh, Santa Clara, CA (US);

Matthew J. Sendelbach, Fishkill, NY (US);

Narender N. Rana, Highland, NY (US);

Assignees:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 19/00 (2011.01); H01L 21/66 (2006.01); G03F 7/20 (2006.01);
U.S. Cl.
CPC ...
H01L 22/12 (2013.01); G03F 7/70625 (2013.01); H01L 22/20 (2013.01);
Abstract

Methods and systems are provided for fabricating and measuring features of a semiconductor device structure. An exemplary method of fabricating a semiconductor device structure involves fabricating a feature of the semiconductor device structure on a wafer of semiconductor material, determining a hybrid recipe for measuring the feature, configuring a plurality of metrology tools to implement the hybrid recipe, and obtaining a hybrid measurement of the feature in accordance with the hybrid recipe.


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