The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9324383 B1

PDF
Full Text
Expired
Date of Patent:
Apr. 26, 2016

Filed:

Mar. 20, 2014
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Gu-Huan Li, Zhubei, TW;

Hsu-Shun Chen, Toufen Town, TW;

Chung-Chieh Chen, New Taipei, TW;

Cheng-Hsiung Kuo, Jhubei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01); G11C 5/14 (2006.01); G11C 11/408 (2006.01); G11C 8/08 (2006.01); G11C 7/12 (2006.01); G11C 16/24 (2006.01); G11C 16/30 (2006.01);
U.S. Cl.
CPC ...
G11C 5/147 (2013.01); G11C 5/145 (2013.01); G11C 7/12 (2013.01); G11C 8/08 (2013.01); G11C 11/408 (2013.01); G11C 16/24 (2013.01); G11C 16/30 (2013.01);
Abstract

An integrated circuit that includes a generator unit connected to one or more pull-up units, one or more pull-up units connected to one or more source lines and an array of memory cells connected to the one or more source lines. The generator unit is configured to set a first voltage signal of each pull-up unit of the one or more pull-up units. Each pull-up unit of the one or more pull-up units is connected with the corresponding source line of the one or more source lines and is configured to set a current of the corresponding source line of the one or more source lines. The array of memory cells is electrically connected to the one or more source lines and one or more bit lines.


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