The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 19, 2016
Filed:
Dec. 26, 2013
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Daniel Lamborn, Hillsboro, OR (US);
Oleg Golonzka, Beaverton, OR (US);
Christopher Wiegand, Portland, OR (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 43/02 (2006.01); H01L 43/08 (2006.01); H01L 43/10 (2006.01); H01L 43/12 (2006.01);
U.S. Cl.
CPC ...
H01L 43/02 (2013.01); H01L 43/08 (2013.01); H01L 43/10 (2013.01); H01L 43/12 (2013.01);
Abstract
Methods of forming a memory device structure are described. Those methods may include forming a non-conductive spacer material on a top electrode of a magnetic tunnel junction structure, and then forming a highly selective material on the non-conductive spacer material of the magnetic tunnel junction prior to etching a bottom electrode of the magnetic tunnel junction.
Lamborn, Daniel. (2016). Methods of forming a magnetic random access memory etch spacer and structures formed thereby (U.S. Patent No. 9318694). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9318694
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile