The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 12, 2016
Filed:
Sep. 06, 2012
Tai-su Park, Seoul, KR;
Gun-joong Lee, Suwon-si, KR;
Young-dong Lee, Suwon-si, KR;
Sang-chul Han, Suwon-si, KR;
Joo-byoung Yoon, Yongin-si, KR;
Tai-Su Park, Seoul, KR;
Gun-Joong Lee, Suwon-si, KR;
Young-Dong Lee, Suwon-si, KR;
Sang-Chul Han, Suwon-si, KR;
Joo-Byoung Yoon, Yongin-si, KR;
SAMSUNG ELECTRONICS CO., LTD., Gyeonggi-Do, KR;
Abstract
A method of fabricating a semiconductor device may include: forming a field region defining an active region in a substrate; forming a gate trench in which the active and field regions are partially exposed; forming a gate insulating layer on a surface of the active region; conformally forming a gate barrier layer including metal on the gate insulating layer and partially exposed field region; forming a gate electrode layer including metal on the gate barrier layer; and/or forming a gate capping layer. Forming the gate insulating layer may include forming a first gate oxide layer by primarily oxidizing the active region's surface, and forming a second gate oxide layer between the active region's surface and the first gate oxide layer by secondarily oxidizing the active region's surface. The gate capping layer may be in contact with the gate insulating layer, gate barrier layer, and/or gate electrode layer.