The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 29, 2016
Filed:
Mar. 07, 2014
Applied Materials, Inc., Santa Clara, CA (US);
He Ren, San Jose, CA (US);
Mehul B. Naik, San Jose, CA (US);
Yong Cao, San Jose, CA (US);
Sree Rangasai V. Kesapragada, Milpitas, CA (US);
Mei-Yee Shek, Palo Alto, CA (US);
Yana Cheng, San Jose, CA (US);
APPLIED MATERIALS, INC., Santa Clara, CA (US);
Abstract
Methods for forming a passivation protection structure on a metal line layer formed in an insulating material in an interconnection structure are provided. In one embodiment, a method for forming passivation protection on a metal line in an interconnection structure for semiconductor devices includes selectively forming a metal capping layer on a metal line bounded by a dielectric bulk insulating layer in an interconnection structure formed on a substrate in a processing chamber incorporated in a multi-chamber processing system, in-situ forming a barrier layer on the substrate in the processing chamber; wherein the barrier layer is a metal dielectric layer, and forming a dielectric capping layer on the barrier layer in the multi-chamber processing system.