The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 22, 2016
Filed:
Mar. 18, 2013
Globalfoundries Inc., Cayman Islands, KY;
Geng Wang, Stormville, NY (US);
Roger A. Booth, Jr., Wappingers Falls, NY (US);
Kangguo Cheng, Schenectady, NY (US);
Joseph Ervin, Hopewell Junction, NY (US);
Chengwen Pei, Danbury, CT (US);
Ravi M. Todi, San Diego, CA (US);
GLOBALFOUNDRIES INC., Grand Cayman, KY;
Abstract
A semiconductor structure is provided that includes a material stack including an epitaxially grown semiconductor layer on a base semiconductor layer, a dielectric layer on the epitaxially grown semiconductor layer, and an upper semiconductor layer present on the dielectric layer. A capacitor is present extending from the upper semiconductor layer through the dielectric layer into contact with the epitaxially grown semiconductor layer. The capacitor includes a node dielectric present on the sidewalls of the trench and an upper electrode filling at least a portion of the trench. A substrate contact is present in a contact trench extending from the upper semiconductor layer through the dielectric layer and the epitaxially semiconductor layer to a doped region of the base semiconductor layer. A substrate contact is also provided that contacts the base semiconductor layer through the sidewall of a trench. Methods for forming the above-described structures are also provided.