The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 15, 2016
Filed:
Jun. 24, 2015
Globalfoundries, Inc., Grand Cayman, KY;
Jinping Liu, Ballston Lake, NY (US);
Bharat Krishnan, Clifton Park, NY (US);
Bongki Lee, Malta, NY (US);
Vidmantas Sargunas, Clifton Park, NY (US);
Weihua Tong, Mechanicville, NY (US);
Seung Kim, Mechanicville, NY (US);
GLOBALFOUNDRIES, INC., Grand Cayman, KY;
Abstract
Methods for fabricating integrated circuits are provided. In an embodiment, a method for fabricating an integrated circuit includes forming a first fin structure overlying a first type region in a semiconductor substrate and forming a second fin structure overlying a second type region in the semiconductor substrate. A gate is formed overlying each fin structure and defines a channel region in each fin structure. The method includes masking the second type region and etching the first fin structure around the gate in the first fin structure to expose the channel region in the first fin structure. Further, the method includes doping the channel region in the first fin structure, and forming source/drain regions of the first fin structure around the channel region in the first fin structure.