The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 01, 2016

Filed:

Dec. 04, 2014
Applicants:

Intermolecular Inc., San Jose, CA (US);

Kabushiki Kaisha Toshiba, Tokyo, JP;

Sandisk 3d Llc, Milpitas, CA (US);

Inventor:

Mihir Tendulkar, Mountain View, CA (US);

Assignees:

Intermolecular, Inc., San Jose, CA (US);

Kabushiki Kaisha Toshiba, Tokyo, JP;

SanDisk 3D LLC, Milpitas, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 45/00 (2006.01); H01L 27/00 (2006.01);
U.S. Cl.
CPC ...
H01L 45/145 (2013.01); H01L 45/126 (2013.01); H01L 45/1608 (2013.01);
Abstract

In a thin-film resistor stack (e.g. A ReRAM embedded resistor), a metallic barrier layer 1-5 nm thick protects an underlying or overlying ternary metal nitride layer from unwanted oxidation while having negligible effect on the resistance or height of the stack. For devices subjected to temperatures over 650 C after forming the stack, the metallic barrier layer may be iridium or ruthenium. For devices with temperatures kept below 650 C after forming the stack, the metallic barrier layer may be Al. The metallic barrier layer(s) and the ternary nitride layer may be formed in situ, for example by sputtering or atomic layer deposition.


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