The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 23, 2016

Filed:

Feb. 26, 2015
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Po-Cheng Shih, Hsnchu, TW;

Hui-Chun Yang, Hsinchu, TW;

Chih-Hung Sun, Hsinchu, TW;

Joung-Wei Liou, Zhudong Town, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/314 (2006.01); H01L 21/768 (2006.01); H01L 23/485 (2006.01); H01L 23/522 (2006.01); H01L 23/532 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76826 (2013.01); H01L 21/3148 (2013.01); H01L 21/76807 (2013.01); H01L 21/76814 (2013.01); H01L 21/76829 (2013.01); H01L 21/76849 (2013.01); H01L 21/76883 (2013.01); H01L 23/485 (2013.01); H01L 23/5226 (2013.01); H01L 23/53295 (2013.01); H01L 23/53223 (2013.01); H01L 23/53238 (2013.01); H01L 2924/00 (2013.01); H01L 2924/0002 (2013.01);
Abstract

A method of forming a semiconductor device comprises forming a first etch stop layer over a substrate. The method also comprises forming a low-k dielectric layer comprising carbon over the first etch stop layer. The method further comprises forming an opening in the low-k dielectric layer. The method additionally comprises filling the opening with a conductive layer. The method also comprises performing a remote plasma treatment on the low-k dielectric layer and the conductive layer. The method further comprises forming a second etch stop layer over the treated conductive layer and the treated low-k dielectric layer.


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