The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 09, 2016

Filed:

Mar. 15, 2013
Applicant:

Globalfoundries Inc., Grand Cayman, KY;

Inventors:

Timothy H. Daubenspeck, Colchester, VT (US);

Jeffrey P. Gambino, Westford, VT (US);

Christopher D. Muzzy, Burlington, VT (US);

Wolfgang Sauter, Hinesburg, VT (US);

Assignee:

GlobalFoundries, Inc., Grand Cayman, KY;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/02 (2006.01); G01R 31/26 (2014.01); H01L 21/66 (2006.01);
U.S. Cl.
CPC ...
H01L 22/34 (2013.01);
Abstract

A test wafer is disclosed with a first side configured to have integrated circuits formed thereon and a second side with a test structure formed thereon. The test wafer can include electrical test structures embedded in the second side of the wafer. An electrical test of the test wafer can be performed after handling by a tool used in a wafer manufacturing process to determine if the tool caused a defect on the second side of the wafer. The test structure can include a blanket layer disposed on the second side of the wafer. The test wafer can then be exposed to a wet etch and inspected thereafter for the presence of an ingress path caused from the etch chemistry. The presence of an ingress path is an indication that the tool used prior to the wet etch caused a defect in the wafer.


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