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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9252146 B1

PDFFull Text
Date of Patent:
Feb. 02, 2016

Filed:

May. 19, 2014

Work function adjustment by carbon implant in semiconductor devices including gate structure

Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Yue Liang, Sunnyvale, CA (US);

Dechao Guo, Fishkill, NY (US);

William K. Henson, Beacon, NY (US);

Shreesh Narasimha, Beacon, NY (US);

Yanfeng Wang, Fishkill, NY (US);

Assignee:

INTERNATIONAL BUSINESS MACHINES CORPORATION, Armonk, NY (US);

Attorneys:

Scully, Scott, Murphy & Presser, P.C.

Steven J. Meyers, Esq.

Primary Examiner:

Long K Tran

Assistant Examiner:

Dzung Tran

Int. Cl.
CPC ...
H01L 21/70 (2006.01); H01L 27/12 (2006.01); H01L 21/00 (2006.01); H01L 21/425 (2006.01); H01L 27/092 (2006.01); H01L 21/8238 (2006.01); H01L 21/265 (2006.01); H01L 21/28 (2006.01); H01L 29/10 (2006.01); H01L 29/51 (2006.01);
U.S. Cl.
CPC ...
H01L 27/092 (2013.01); H01L 21/26506 (2013.01); H01L 21/28088 (2013.01); H01L 21/28176 (2013.01); H01L 21/28194 (2013.01); H01L 21/823857 (2013.01); H01L 29/1054 (2013.01); H01L 29/517 (2013.01);
Abstract

A device including a p-type semiconductor device and an n-type semiconductor device on a semiconductor substrate. The n-type semiconductor device includes a gate structure having a high-k gate dielectric. A carbon dopant in a concentration ranging from 1×10atoms/cmto 1×10atoms/cmis present at an interface between the high-k gate dielectric of the gate structure for the n-type semiconductor device and the semiconductor substrate. Methods of forming the aforementioned device are also disclosed.

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