The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 26, 2016

Filed:

Jun. 27, 2014
Applicant:

Alpha and Omega Semiconductor Incorporated, Sunnyvale, CA (US);

Inventors:

Yan Xun Xue, Los Gatos, CA (US);

Hamza Yilmaz, Saratoga, CA (US);

Yueh-Se Ho, Sunnyvale, CA (US);

Jun Lu, San Jose, CA (US);

Zhiqiang Niu, Santa Clara, CA (US);

Guo Feng Lian, Shanghai, CN;

Hong Xia Fu, Shanghai, CN;

Yu Ping Gong, Shanghai, CN;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/461 (2006.01); H01L 23/00 (2006.01); H01L 21/71 (2006.01); H01L 21/768 (2006.01); H01L 21/78 (2006.01); H01L 23/492 (2006.01); H01L 21/56 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 24/11 (2013.01); H01L 21/561 (2013.01); H01L 21/76898 (2013.01); H01L 21/78 (2013.01); H01L 23/492 (2013.01); H01L 24/94 (2013.01); H01L 23/3114 (2013.01); H01L 24/05 (2013.01); H01L 24/06 (2013.01); H01L 24/13 (2013.01); H01L 24/32 (2013.01); H01L 24/73 (2013.01); H01L 24/83 (2013.01); H01L 2224/02371 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/04026 (2013.01); H01L 2224/05025 (2013.01); H01L 2224/0557 (2013.01); H01L 2224/05571 (2013.01); H01L 2224/06181 (2013.01); H01L 2224/11009 (2013.01); H01L 2224/131 (2013.01); H01L 2224/13013 (2013.01); H01L 2224/13014 (2013.01); H01L 2224/13022 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/73104 (2013.01); H01L 2224/73153 (2013.01); H01L 2224/83005 (2013.01); H01L 2224/94 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/1306 (2013.01); H01L 2924/13091 (2013.01); H01L 2924/181 (2013.01);
Abstract

A wafer process for MCSP comprises: depositing a metal bump on bonding pads of chips; forming a first packaging layer at front surface of wafer covering metal bumps while forming an un-covered ring at the edge of wafer to expose the ends of each scribe line located between two adjacent chips; thinning first packaging layer to expose metal bumps; grinding back surface of wafer to form a recessed space and a support ring at the edge of the wafer; depositing a metal seed layer and a thick metal layer at bottom surface of wafer in recessed space in a sequence; cutting off the edge portion of wafer; and separating individual chips from wafer by cutting through first packaging layer, the wafer and the metal seed and metal layers along the scribe line.


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