The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 19, 2016
Filed:
Jun. 18, 2013
Applicant:
Agency for Science, Technology and Research, Singapore, SG;
Inventors:
Vivek Chidambaram, Singapore, SG;
Ling Xie, Singapore, SG;
Ranganathan Nagarajan, Singapore, SG;
Bangtao Chen, Singapore, SG;
Beng Yeung Ho, Singapore, SG;
Assignee:
Agency for Science, Technology and Research, Singapore, SG;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/20 (2006.01); H01L 23/26 (2006.01); C22C 14/00 (2006.01); C22C 19/03 (2006.01); B81B 7/00 (2006.01); B81C 1/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/26 (2013.01); B81B 7/0038 (2013.01); B81C 1/00285 (2013.01); C22C 14/00 (2013.01); C22C 19/03 (2013.01); H01L 2924/0002 (2013.01);
Abstract
The invention relates to a layer arrangement and a wafer level package comprising the layer arrangement, and in particular, the layer arrangement comprises a getter layer and further comprises a sacrificial layer. The wafer level package may be used in microelectromechanical systems (MEMS) packaging at a vacuum level of about 10 mTorr or less such as close to 1 mTorr (i.e. MEMS vacuum packaging).