The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 08, 2015

Filed:

Jun. 21, 2012
Applicants:

Xiao Ling Shi, Ontario, CA;

Suming HU, Ontario, CA;

Liane Martinez, Ontario, CA;

Roden Topacio, Ontario, CA;

Terence Cheung, San Diego, CA (US);

Inventors:

Xiao Ling Shi, Ontario, CA;

Suming Hu, Ontario, CA;

Liane Martinez, Ontario, CA;

Roden Topacio, Ontario, CA;

Terence Cheung, San Diego, CA (US);

Assignees:

ATI Technologies ULC, Markham, CA;

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 7/20 (2006.01); H01L 23/367 (2006.01); H01L 23/498 (2006.01); H05K 1/02 (2006.01); H05K 3/34 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3677 (2013.01); H01L 23/49833 (2013.01); H05K 1/0206 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/73253 (2013.01); H01L 2924/15311 (2013.01); H05K 3/3436 (2013.01); H05K 2201/10416 (2013.01); Y10T 29/49139 (2015.01);
Abstract

A method of assembling a semiconductor chip device is provided. The method includes providing a first circuit board that has a plurality of thermally conductive vias. A second circuit board is mounted on the first circuit board over and in thermal contact with the thermally conductive vias. The second circuit board includes first side facing the first circuit board and a second and opposite side.


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