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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9202707 B1

PDFFull Text
Date of Patent:
Dec. 01, 2015

Filed:

Feb. 05, 2013

Semiconductor device manufacturing method

Applicant:

Tokyo Electron Limited, Tokyo, JP;

Inventors:

Masaya Kawamata, Miyagi, JP;

Masanobu Honda, Miyagi, JP;

Assignee:

Tokyo Electron Limited, Tokyo, JP;

Attorney:

IPUSA, PLLC

Primary Examiner:

Shamim Ahmed

Int. Cl.
CPC ...
B44C 1/22 (2006.01); H01L 21/3065 (2006.01); H01L 21/308 (2006.01); H01L 21/027 (2006.01); H01L 21/311 (2006.01); H01L 27/115 (2006.01); H01J 37/32 (2006.01); H01L 21/768 (2006.01);
U.S. Cl.
CPC ...
H01L 21/3065 (2013.01); H01J 37/32091 (2013.01); H01J 37/32165 (2013.01); H01L 21/0273 (2013.01); H01L 21/308 (2013.01); H01L 21/31116 (2013.01); H01L 21/31138 (2013.01); H01L 21/31144 (2013.01); H01L 21/76838 (2013.01); H01L 27/11556 (2013.01); H01L 27/11582 (2013.01); H01J 2237/334 (2013.01);
Abstract

A semiconductor device manufacturing method is provided that includes etching with a plasma a multilayer film including a first film and a second film with differing dielectric constants alternately stacked on a substrate using a photoresist layer arranged on the multilayer film as a mask, and forming the multilayer film into a stepped configuration. The semiconductor device manufacturing method includes repetitively performing a first step of etching the first film using the photoresist layer as the mask; a second step of adjusting a pressure within a processing chamber to 6-30 Torr, generating the plasma by applying a first high frequency power for biasing and a second high frequency power for plasma generation to the lower electrode, and etching the photoresist layer using the generated plasma; and a third step of etching the second film using the photoresist layer and the first film as the mask.

Find Patent Forward Citations

Kawamata, Masaya. (2015). Semiconductor device manufacturing method (U.S. Patent No. 9202707). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9202707

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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