The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 03, 2015

Filed:

May. 22, 2014
Applicant:

Sandisk Technologies, Inc., Plano, TX (US);

Inventors:

Vinod R. Purayath, Santa Clara, CA (US);

James Kai, Santa Clara, CA (US);

Donovan Lee, Santa Clara, CA (US);

Akira Matsudaira, San Jose, CA (US);

Yuan Zhang, San Jose, CA (US);

Assignee:

SANDISK TECHNOLOGIES INC., Plano, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/115 (2006.01); H01L 21/28 (2006.01); H01L 29/423 (2006.01); H01L 29/51 (2006.01); H01L 29/788 (2006.01); H01L 29/792 (2006.01);
U.S. Cl.
CPC ...
H01L 21/28273 (2013.01); H01L 21/28282 (2013.01); H01L 29/4234 (2013.01); H01L 29/42324 (2013.01); H01L 29/513 (2013.01); H01L 29/7881 (2013.01); H01L 29/792 (2013.01); H01L 27/1157 (2013.01); H01L 27/11524 (2013.01);
Abstract

An embodiment relates to a memory device that includes a semiconductor channel, a tunnel dielectric located over the semiconductor channel, a charge storage region located over the tunnel dielectric, a blocking dielectric located over the charge storage region, and a control gate located over the blocking dielectric. An interface between the blocking dielectric and the control gate substantially prevents oxygen diffusion from the blocking dielectric into the control gate.


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